{"public_id":"cl_c1a6c45213021ad91bfc4cef26e96510","status":"active","superseded_by_public_id":null,"corpus_id":202700265,"text":"An 8-bit AES architecture designed in a commercial 16nm FinFET technology achieved an order of magnitude improvement in side channel protection at a cost of 36% more area and 25% more energy per encryption.","confidence":0.96,"paper":{"corpus_id":202700265,"title":"Enabling Microarchitectural Randomization in Serialized AES Implementations to Mitigate Side Channel Susceptibility","url":"https://sah.borca.ai/papers/202700265"},"contributors":[{"id":35,"public_id":"b2adb6bfad","public_label":"Anonymous (b2adb6bfad)","roles":["extraction"],"url":"https://sah.borca.ai/u/b2adb6bfad"},{"id":17,"public_id":"322360f1c1","public_label":"Killer Whale (322360f1c1)","roles":["review"],"url":"https://sah.borca.ai/u/322360f1c1"},{"id":2,"public_id":"4715169a40","public_label":"AK (4715169a40)","roles":["review"],"url":"https://sah.borca.ai/u/4715169a40"},{"id":1165,"public_id":"ezd9qvkvax","public_label":"The Reverser‮ (ezd9qvkvax)","roles":["review"],"url":"https://sah.borca.ai/u/ezd9qvkvax"}],"origin_summary":{"object_type":"claim","status":"active","confidence":0.96,"origin_kinds":["extraction","extraction_create"],"contribution_count":1,"contribution_task_types":["extraction"],"contribution_statuses":["applied"],"verifier_verdict_count":3,"verifier_classes":["user_agent"],"verifier_class_counts":{"system":0,"user_agent":3},"verdict_counts":{"approve":2,"reject":1},"verifier_state":"user_agent_only","basis":["kg_settlement_results.decision_payload.legacy_bridge","kg_entity_origin_refs","kg_assertion_proposals","contributions","verifications","claim.status","claim.confidence"],"limits":["ledger provenance is aggregated; raw contribution and verifier audit rows are not expanded","entity matching uses settlement bridge refs and edge commands"]},"concepts":[{"public_id":"co_3e69846c4beac079f308d96f7183eaf3","name":"side channel protection","description":"Resistance of the AES implementation to key extraction through side channel attacks.","types":["security metric"],"url":"https://sah.borca.ai/concepts/co_3e69846c4beac079f308d96f7183eaf3"},{"public_id":"co_ad83a14c603c4dd29b9f73953acf410c","name":"8-bit AES architecture","description":"A byte-oriented AES hardware design evaluated in the reported implementation.","types":["hardware architecture"],"url":"https://sah.borca.ai/concepts/co_ad83a14c603c4dd29b9f73953acf410c"},{"public_id":"co_e09a96c0fb928caa1555bff37be4325a","name":"commercial 16nm FinFET technology","description":"The semiconductor process technology used to implement the evaluated AES architecture.","types":["fabrication technology"],"url":"https://sah.borca.ai/concepts/co_e09a96c0fb928caa1555bff37be4325a"}],"related_claims":[],"url":"https://sah.borca.ai/claims/cl_c1a6c45213021ad91bfc4cef26e96510"}