In the presence of dynamic insertions and deletions into a partially reconfigurable FPGA, fragmentation is unavoidable. This poses the challenge of developing efficient approaches to dynamic defragmentation and reallocation. One key aspect is to develop efficient algorithms and data structures that exploit the two-dimensional geometry of a chip, instead of just one. We propose a new method for this task, based on the fractal structure of a quadtree, which allows dynamic segmentation of the chip area, along with dynamically adjusting the necessary communication infrastructure. We describe a number of algorithmic aspects, and present different solutions. We also provide experimental data for various scenarios, indicating practical usefulness of our approach.
An efficient data structure for dynamic two-dimensional reconfiguration
S. Fekete,J. Reinhardt,Christian Scheffer
Published 2016 in Journal of systems architecture
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- Publication year
2016
- Venue
Journal of systems architecture
- Publication date
2016-04-04
- Fields of study
Computer Science, Engineering
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