A current-saving match-line sensing scheme for content-addressable memories

No abstract is available for this paper.

• Publication year

  2003

• Venue

  2003 IEEE International Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC.

• Publication date

  2003-02-09

• Fields of study

  Computer Science, Engineering

• Identifiers
  DOI 10.1109/ISSCC.2003.1234309
• External record

  Open on Semantic Scholar

• Source metadata

  Semantic Scholar

• No claims are published for this paper.

• No concepts are published for this paper.

• A mismatch-dependent power allocation technique for match-line sensing in content-addressable memories

  2003cited by this paper
• A ternary content-addressable memory (TCAM) based on 4T static storage and including a current-race sensing scheme

  2003cited by this paper
• A 1-V 128-kb four-way set-associative CMOS cache memory using wordline-oriented tag-compare (WLOTC) structure with the content-addressable-memory (CAM) 10-transistor tag cell

  2001cited by this paper
• Power modeling and low-power design of content addressable memories

  2001cited by this paper
• Fully-parallel 25 MHz 2.5 Mb CAM

  1998cited by this paper

• High-Speed, Low-Power, and Area-Efficient 5T4M Memristor-Based Ternary Content Addressable Memory

  2023cites this paper
• A 100 MHz 0.41 fJ / (Bit · Search) 28 nm CMOS-Bulk Content Addressable Memory for HEP Experiments

  2020cites this paper
• PRE-CHARGE FREE SOFT ERROR HARDENED CAM CELL DESIGN FOR LOW POWER AND HIGH PERFORMANCE

  2019cites this paper
• Hybrid self-controlled precharge-free CAM design for low power and high performance

  2019cites this paper
• Dynamisch adaptive Mikroarchitekturen mit optimierten Speicherstrukturen und variablen Befehlssätzen

  2019cites this paper
• Low Match-Line Voltage Swing Technique for Content Addressable Memory

  2019cites this paper
• Low-Power Ternary Content-Addressable Memory Using Power Reduction of Match-Line and Search-Line

  2018cites this paper
• Performance Enhancement of Content Addressable Memory with Precharge Free Technique

  2018cites this paper
• Efficient Precharge-Free CAM Match-Line Architecture Design for Low Power

  2018cites this paper
• A low power content addressable memory with self-control mechanism and segmented matchlines

  2017cites this paper
• Self-Controlled High-Performance Precharge-Free Content-Addressable Memory

  2017cites this paper
• Data Intelligent Low Power High Performance TCAM for IP-Address Lookup Table

  2016cites this paper
• Content Addressable Memory Using Automatic Charge Balancing with Self-Control Mechanism and Master-Slave Match Line Design

  2016cites this paper
• High speed content addressable memory with reduced size and less power consumption

  2016cites this paper
• A low power and high speed CAM design using pulsed voltage for search-line

  2015cites this paper
• Automatic Charge Balancing Content Addressable Memory With Self-control Mechanism

  2014cites this paper
• A Low Power Content Addressable MemoryImplemented In Deep Submicron Technology

  2014cites this paper
• A 250 Msps, 0.5 W eDRAM-Based Search Engine Dedicated Low Power FIB Application

  2013cites this paper
• Development and analysis of energy efficient match-line sensing circuits for high-speed ternary content addressable memory

  2013influential citation
• Smart Ternary Content Addressable Memory (STCAM) architecture

  2012cites this paper
• Verification of an efficient Match-line Sense Amplifier for the High Frequency Search Operation

  2012cites this paper
• Hybrid Partitioned SRAM-Based Ternary Content Addressable Memory

  2012cites this paper
• Design of a Low-Energy Nonvolatile Fully-Parallel Ternary CAM Using a Two-Level Segmented Match-Line Scheme

  2011cites this paper
• A novel match-line selective charging scheme for high-speed, low-power and noise-tolerant content-addressable memory

  2010influential citation
• Proposal for the development of 3D Vertically Integrated Pattern Recognition Associative Memory (VIPRAM)

  2010cites this paper
• A cascaded charge-sharing technique for an EDP-efficient match-line design in CAMs

  2009cites this paper
• Self-timed charge recycling search-line drivers in content-addressable memories

  2009cites this paper
• Power Considerations in Banked CAMs: A Leakage Reduction Approach

  2008cites this paper
• TCAM for IP-Address Lookup Using Tree-style AND-type Match Lines and Segmented Search Lines

  2006cites this paper
• A New Mismatch-Dependent Low Power Technique with Shadow Match-Line Voltage-Detecting Scheme for CAMs

  2006cites this paper
• Leakage Energy Reduction in Banked Content Addressable Memories

  2006cites this paper
• An AND-type match-line scheme for high-performance energy-efficient content addressable memories

  2006cites this paper
• A High-Performance TCAM Macro with the Folded Architecture for IP Routing Address Lookup

  2006cites this paper
• A banked precomputation-based CAM architecture for low-power storage-demanding applications

  2006cites this paper
• An AND-type match-line scheme for high-performance energy-efficient content addressable memories

  2006cites this paper
• Content-addressable memory (CAM) circuits and architectures: a tutorial and survey

  2006cites this paper
• A Low-Power Technique Based on Charge Injection and Current-Saving Methods for Match-Line Sensing in Content-Addressable Memories

  2006influential citation
• The Split-Path AND-type Match-line Scheme for Very High-Speed Content Addressable Memories

  2005cites this paper
• From optical near-field interaction to nanophotonic information systems

  2005cites this paper
• Nanophotonic Computing Based on Optical Near-Field Interactions between Quantum Dots

  2005cites this paper
• with Hierarchical Searching and Shift Redundancy Architecture

  2004cites this paper
• A 143MHz 1.1W 4.5Mb dynamic TCAM with hierarchical searching and shift redundancy architecture

  2004cites this paper
• A 0.7fJ/bit/search, 2.2ns search time hybrid type TCAM architecture

  2004cites this paper
• A 0.7-fJ/bit/search 2.2-ns search time hybrid-type TCAM architecture

  2004cites this paper
• Pipelined match-lines and hierarchical search-lines for low-power content-addressable memories

  2003cites this paper
• 200MHz/200MSPS 3.2W at 1.5V Vdd, 9.4Mbits ternary CAM with new charge injection match detect circuits and bank selection scheme

  2003cites this paper
• A mismatch-dependent power allocation technique for match-line sensing in content-addressable memories

  2003cites this paper