A new divide and conquer method for achieving high speed division in hardware

No abstract is available for this paper.

• Publication year

  2002

• Venue

  Proceedings of ASP-DAC/VLSI Design 2002. 7th Asia and South Pacific Design Automation Conference and 15h International Conference on VLSI Design

• Publication date

  2002-01-07

• Fields of study

  Computer Science, Engineering

• Identifiers
  DOI 10.1109/ASPDAC.2002.994974
• External record

  Open on Semantic Scholar

• Source metadata

  Semantic Scholar

• No claims are published for this paper.

• No concepts are published for this paper.

• Division Algorithms and Implementations

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• SRT division architectures and implementations

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• Fast Multiplication: Algorithms and Implementations

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• Boosting very-high radix division with prescaling and selection by rounding

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• Parallel High-Radix Nonrestoring Division

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• Computation of Elementary Functions on the IBM RISC System/6000 Processors

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• On-the-Fly Conversion of Redundant into Conventional Representations

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• IEEE Standard for Binary Floating Point Arithmetic

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• Computer Arithmetic

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• No citing papers are available for this paper.