{"corpus_id":26165185,"paper_sha":"20c4ab80b89a5fa4d713819ac467f6e91f4a2826","doi":"10.1145/2934583.2934585","arxiv_id":null,"pmid":null,"pmcid":null,"mag_id":2498189503,"dblp_id":"conf/islped/ChenG16","acl_id":null,"title":"Analysis and Design of Energy Efficient Time Domain Signal Processing","year":2016,"publication_date":"2016-08-08","venue":"International Symposium on Low Power Electronics and Design","journal":{"name":"Proceedings of the 2016 International Symposium on Low Power Electronics and Design","pages":null,"volume":null},"journal_issn":null,"journal_title":null,"publication_types":["JournalArticle","Book","Conference"],"pubmed_pub_types":null,"s2_fields_of_study":["Computer Science","Engineering"],"reference_count":21,"citation_count":14,"influential_citation_count":0,"is_open_access":false,"arxiv_categories":null,"arxiv_license":null,"arxiv_journal_ref":null,"mesh_headings":null,"chemicals":null,"comments_corrections":null,"source_flags":1,"s2_open_access_pdf_url":null,"s2_open_access_landing_url":null,"s2_open_access_license":null,"s2_open_access_status":null,"pmc_open_access_pdf_url":null,"pmc_open_access_landing_url":null,"pmc_open_access_license":null,"pmc_open_access_status":null,"unpaywall_open_access_pdf_url":null,"unpaywall_open_access_landing_url":null,"unpaywall_open_access_license":null,"unpaywall_open_access_status":null,"abstract":"Time domain signal processing (TDSP) encodes information into time rather than voltage with higher efficiency than conventional digital design. This paper performs systematical analysis on the design principle and energy efficiency of TDSP. Variation impact, which poses significant challenges to TDSP, is evaluated and a variation driven design methodology is proposed to achieve an optimum tradeoff between energy efficiency and design robustness. Several novel circuit level design techniques such as dual encoding strategy and bit-scalable design are also proposed in this work to significantly improve the energy efficiency of TDSP. Design example on a critical building block of facial recognition application was used to demonstrate the potential of the technique. The result in a 45nm technology shows 3.3X energy-delay product reduction and 34% area saving can be achieved using TDSP compared with conventional digital design technique.","claims":[{"public_id":"cl_d1edfc87ce8b77c36eb8230b927db85e","status":"active","text":"Dual encoding strategy and bit-scalable design are proposed as circuit-level techniques to improve the energy efficiency of time domain signal processing.","confidence":0.95,"contributors":[{"id":1,"public_id":"12632b8b5f","public_label":"Anonymous (12632b8b5f)","roles":["extraction"],"url":"https://sah.borca.ai/u/12632b8b5f"}],"url":"https://sah.borca.ai/claims/cl_d1edfc87ce8b77c36eb8230b927db85e"},{"public_id":"cl_7589a517d06a5e871c5f120d82ccd73e","status":"active","text":"In a 45 nm technology design example for a facial-recognition building block, time domain signal processing achieves a 3.3X energy-delay product reduction and 34% area saving compared with conventional digital design.","confidence":0.98,"contributors":[{"id":1,"public_id":"12632b8b5f","public_label":"Anonymous (12632b8b5f)","roles":["extraction"],"url":"https://sah.borca.ai/u/12632b8b5f"}],"url":"https://sah.borca.ai/claims/cl_7589a517d06a5e871c5f120d82ccd73e"},{"public_id":"cl_8c020fe2b8f32aa762486e35f27f9c96","status":"active","text":"Variation impact is a major challenge for time domain signal processing and a variation-driven design methodology is proposed to balance energy efficiency with design robustness.","confidence":0.96,"contributors":[{"id":1,"public_id":"12632b8b5f","public_label":"Anonymous (12632b8b5f)","roles":["extraction"],"url":"https://sah.borca.ai/u/12632b8b5f"}],"url":"https://sah.borca.ai/claims/cl_8c020fe2b8f32aa762486e35f27f9c96"}],"concepts":[{"public_id":"co_2369fd8d126d31b53d7551d5e673e07d","status":"active","name":"variation-driven design methodology","description":"A design approach that uses variation considerations to guide circuit design choices.","types":["method"],"aliases":[],"contributors":[{"id":1,"public_id":"12632b8b5f","public_label":"Anonymous (12632b8b5f)","roles":["extraction"],"url":"https://sah.borca.ai/u/12632b8b5f"}],"url":"https://sah.borca.ai/concepts/co_2369fd8d126d31b53d7551d5e673e07d"},{"public_id":"co_4d32e72cdc5b96b5d97074a0bea9b882","status":"active","name":"dual encoding strategy","description":"A circuit-level encoding scheme that uses two forms of encoding to represent information.","types":["design technique"],"aliases":[],"contributors":[{"id":1,"public_id":"12632b8b5f","public_label":"Anonymous (12632b8b5f)","roles":["extraction"],"url":"https://sah.borca.ai/u/12632b8b5f"}],"url":"https://sah.borca.ai/concepts/co_4d32e72cdc5b96b5d97074a0bea9b882"},{"public_id":"co_5821f9610a1016145d53f21adbe9c51a","status":"active","name":"variation impact","description":"The effect of process or device variation on the behavior and reliability of a circuit design.","types":["design challenge"],"aliases":[],"contributors":[{"id":1,"public_id":"12632b8b5f","public_label":"Anonymous (12632b8b5f)","roles":["extraction"],"url":"https://sah.borca.ai/u/12632b8b5f"}],"url":"https://sah.borca.ai/concepts/co_5821f9610a1016145d53f21adbe9c51a"},{"public_id":"co_5a7509d33a2b62339fb12918a3c1ab15","status":"active","name":"bit-scalable design","description":"A circuit design approach that can adjust its bit-level precision or capacity to match requirements.","types":["design technique"],"aliases":[],"contributors":[{"id":1,"public_id":"12632b8b5f","public_label":"Anonymous (12632b8b5f)","roles":["extraction"],"url":"https://sah.borca.ai/u/12632b8b5f"}],"url":"https://sah.borca.ai/concepts/co_5a7509d33a2b62339fb12918a3c1ab15"},{"public_id":"co_6c22593cfe899cf50e3387ce9957c1c7","status":"active","name":"design robustness","description":"The ability of a design to maintain correct operation despite variation or uncertainty.","types":["design property"],"aliases":[],"contributors":[{"id":1,"public_id":"12632b8b5f","public_label":"Anonymous (12632b8b5f)","roles":["extraction"],"url":"https://sah.borca.ai/u/12632b8b5f"}],"url":"https://sah.borca.ai/concepts/co_6c22593cfe899cf50e3387ce9957c1c7"},{"public_id":"co_7390c2eca335a91b9ab0af5d231de671","status":"active","name":"circuit-level design techniques","description":"Implementation techniques applied at the circuit level to improve design metrics.","types":["method"],"aliases":[],"contributors":[{"id":1,"public_id":"12632b8b5f","public_label":"Anonymous (12632b8b5f)","roles":["extraction"],"url":"https://sah.borca.ai/u/12632b8b5f"}],"url":"https://sah.borca.ai/concepts/co_7390c2eca335a91b9ab0af5d231de671"},{"public_id":"co_9e35653185771d614c4007e2fca56aad","status":"active","name":"45nm technology","description":"A semiconductor manufacturing process node used for the reported design example.","types":["technology node"],"aliases":["45 nm technology"],"contributors":[{"id":1,"public_id":"12632b8b5f","public_label":"Anonymous (12632b8b5f)","roles":["extraction"],"url":"https://sah.borca.ai/u/12632b8b5f"}],"url":"https://sah.borca.ai/concepts/co_9e35653185771d614c4007e2fca56aad"},{"public_id":"co_a79de8e09b5e7a3562716d43a9643f9c","status":"active","name":"time domain signal processing","description":"A signal-processing approach that encodes information in time rather than in voltage.","types":["method"],"aliases":["TDSP"],"contributors":[{"id":1,"public_id":"12632b8b5f","public_label":"Anonymous (12632b8b5f)","roles":["extraction"],"url":"https://sah.borca.ai/u/12632b8b5f"}],"url":"https://sah.borca.ai/concepts/co_a79de8e09b5e7a3562716d43a9643f9c"},{"public_id":"co_af4cc2c85a317c38cb4853255b92a7db","status":"active","name":"energy efficiency","description":"The degree to which a design reduces energy use for a given computation or function.","types":["performance metric"],"aliases":[],"contributors":[{"id":1,"public_id":"12632b8b5f","public_label":"Anonymous (12632b8b5f)","roles":["extraction"],"url":"https://sah.borca.ai/u/12632b8b5f"}],"url":"https://sah.borca.ai/concepts/co_af4cc2c85a317c38cb4853255b92a7db"},{"public_id":"co_bf37f729359842325a348b7d0aac4e74","status":"active","name":"facial recognition application","description":"An application domain involving recognition of faces, used here as the design example context.","types":["application"],"aliases":["facial recognition"],"contributors":[{"id":1,"public_id":"12632b8b5f","public_label":"Anonymous (12632b8b5f)","roles":["extraction"],"url":"https://sah.borca.ai/u/12632b8b5f"}],"url":"https://sah.borca.ai/concepts/co_bf37f729359842325a348b7d0aac4e74"},{"public_id":"co_e39ea4aec47f7dd4fc283a3968ae7836","status":"active","name":"energy-delay product reduction","description":"A decrease in the combined energy and delay metric used to evaluate design efficiency.","types":["performance metric"],"aliases":["EDP reduction"],"contributors":[{"id":1,"public_id":"12632b8b5f","public_label":"Anonymous (12632b8b5f)","roles":["extraction"],"url":"https://sah.borca.ai/u/12632b8b5f"}],"url":"https://sah.borca.ai/concepts/co_e39ea4aec47f7dd4fc283a3968ae7836"},{"public_id":"co_edece9589986d3cbf93cbe62f3b28c5f","status":"active","name":"area saving","description":"A reduction in silicon area required to implement the design.","types":["performance metric"],"aliases":[],"contributors":[{"id":1,"public_id":"12632b8b5f","public_label":"Anonymous (12632b8b5f)","roles":["extraction"],"url":"https://sah.borca.ai/u/12632b8b5f"}],"url":"https://sah.borca.ai/concepts/co_edece9589986d3cbf93cbe62f3b28c5f"}],"external_ids":{"DOI":"10.1145/2934583.2934585","ArXiv":null,"PubMed":null,"PubMedCentral":null,"MAG":2498189503,"DBLP":"conf/islped/ChenG16","ACL":null},"open_access":{"is_open_access":false,"pdf_url":null,"landing_url":"https://sah.borca.ai/papers/26165185","source":null,"pdf_url_source":null,"license":null,"reason":"pdf_url_not_indexed"},"reference_availability":{"status":"available","references_indexed":true,"full_text_available":false,"full_text_source":null,"count_basis":"semantic_scholar_metadata","extraction_status":"not_applicable","reason":null},"source":{"provider":"episteme2","base_corpus":"semantic_scholar_dump","freshness_mode":"unknown","basis":["semantic_scholar_metadata","postgres_metadata"],"limits":["paper metadata is based on indexed upstream scholarly datasets","claims and concepts are available only for extracted papers","absence of claims or concepts means no extracted graph data is available in this response"],"status":"available","degraded":false,"degraded_reasons":[],"diagnostics":{"status":"available","degraded":false,"degraded_reasons":[],"metadata_status":"available","graph_status":"available","abstract_status":"available"},"source_flags":1},"paper_id":633661,"paper_uid":"a13562a2-83cf-4b1f-b22d-c97b76eac527","canonical_identity":{"paper_id":633661,"paper_uid":"a13562a2-83cf-4b1f-b22d-c97b76eac527","identity_status":"available","lookup_basis":"semantic_scholar_external_id","compatibility_path":"corpus_id"},"url":"https://sah.borca.ai/papers/26165185"}