Fingerprinting techniques for field-programmable gate arrayintellectual property protection

No abstract is available for this paper.

• Publication year

  2001

• Venue

  IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.

• Publication date

  2001-10-01

• Fields of study

  Law, Computer Science, Engineering

• Identifiers
  DOI 10.1109/43.952741
• External record

  Open on Semantic Scholar

• Source metadata

  Semantic Scholar

• No claims are published for this paper.

• No concepts are published for this paper.

• Handbook of Applied Cryptography

  2018cited by this paper
• Reading

  1999cited by this paper
• Watermarking-based copyright protection of sequential functions

  1999cited by this paper
• Robust techniques for watermarking sequential circuit designs

  1999cited by this paper
• Effective iterative techniques for fingerprinting design IP [VLSI CAD]

  1999cited by this paper
• Watermarking techniques for intellectual property protection

  1998cited by this paper
• Signature hiding techniques for FPGA intellectual property protection

  1998cited by this paper
• Hierarchical watermarking in IC design

  1998cited by this paper
• Low overhead fault-tolerant FPGA systems

  1998cited by this paper
• Collusion-Secure Fingerprinting for Digital Data

  1998cited by this paper
• Copyright Protection in Video Delivery Networks by Watermarking of Precompressed Video

  1997cited by this paper
• Protocols for Collusion-Secure Asymmetric Fingerprinting (Extended Abstract)

  1997cited by this paper
• Watermarking of MPEG-2 encoded video without decoding and reencoding

  1997cited by this paper
• Can invisible watermarks resolve rightful ownerships?

  1997cited by this paper
• Data hiding for multimedia personalization, interaction, and protection

  1997cited by this paper
• Measuring Positive Externalities from Unobservable Victim Precaution: An Empirical Analysis of Lojack

  1997cited by this paper
• Anonymous Fingerprinting

  1997cited by this paper
• Secure spread spectrum watermarking for images, audio and video

  1996cited by this paper
• Modulation and Information Hiding in Images

  1996cited by this paper
• Tamper resistance: a cautionary note

  1996cited by this paper
• A 160-MHz, 32-b, 0.5-W CMOS RISC Microprocessor

  1996cited by this paper
• Digital watermarks for audio signals

  1996cited by this paper
• ARM System Architecture

  1996cited by this paper
• Protecting ownership rights through digital watermarking

  1996cited by this paper
• Watermarking Document Images with Bounding Box Expansion

  1996cited by this paper
• Techniques for data hiding

  1995cited by this paper
• Performance Study of a Selective Encryption Scheme for the Security of Networked, Real-Time Video

  1995cited by this paper
• Applied cryptography: Protocols, algorithms, and source code in C

  1994cited by this paper
• A fast file system for UNIX

  1984cited by this paper

• Enhanced Detection of Recycled FPGAs Using Gaussian Process Regression with LHS and Active Sampling

  2025cites this paper
• Tiered Blockchain Framework: A Secure, Trustworthy, and Cost-Efficient Solution for the Digital Rights Protection

  2025cites this paper
• A survey on security analysis of machine learning-oriented hardware and software intellectual property

  2023cites this paper
• Symmetrical Protection of Ownership Right's for IP Buyer and IP Vendor using Facial Biometric Pairing

  2022cites this paper
• Design of Multichannel Multirate Signal Acquisition System Based on FPGA

  2022cites this paper
• Utilizing and Extending Trusted Execution Environment in Heterogeneous SoCs for a Pay-Per-Device IP Licensing Scheme

  2021cites this paper
• Automatic Floorplanning and Standalone Generation of Bitstream-Level IP Cores

  2020cites this paper
• Electronics Supply Chain Integrity Enabled by Blockchain

  2019cites this paper
• Crypto based Multi-Variable Fingerprinting for Protecting DSP cores

  2019influential citation
• Recent Attacks and Defenses on FPGA-based Systems

  2019cites this paper
• Zero Knowledge Authentication for Reuse of IPs in Reconfigurable Platforms

  2019influential citation
• A chaotic-based publicly veriable FPGA IP watermark detection scheme

  2019cites this paper
• Publicly verifiable watermarking scheme for intellectual property protection using quantum Chaos and bit plane complexity slicing

  2018cites this paper
• NIWAS: A non-interactive watermark authentication scheme for industrial field-programmable gate array designs

  2018cites this paper
• A Leakage-Resilient FPGA-Based IP Identity Authentication Protocol

  2018cites this paper
• Survey on Security based Watermarking Techniques in FPGA Design

  2018influential citation
• Study on IP Protection Techniques for Integrated Circuit in IOT Environment

  2018cites this paper
• Watermarking Technique for Intellectual Property Protection in FPGA Design

  2018cites this paper
• Robust Design-for-Security Architecture for Enabling Trust in IC Manufacturing and Test

  2018cites this paper
• Defense Against Chip Cloning Attacks Based on Fractional Hopfield Neural Networks

  2017cites this paper
• Publicly Verifiable Watermarking for Intellectual Property Protection in FPGA Design

  2017influential citation
• Enhancing Security of FPGA-Based Embedded Systems with Combinational Logic Binding

  2017cites this paper
• A Timeline for Flash Memory History [The Art of Storage]

  2017cites this paper
• Low overhead symmetrical protection of reusable IP core using robust fingerprinting and watermarking during high level synthesis

  2017cites this paper
• FPGA-Based IP and SoC Security

  2017cites this paper
• IP Trust: The Problem and Design/Validation-Based Solution

  2017cites this paper
• Hardware Security of CE Devices [Hardware Matters]

  2017cites this paper
• Intellectual property (IP) protection using Watermarking and Fingerprinting techniques

  2016cites this paper
• IP Protection of FPGA Cores Through a Novel Public/Secret-Key Encryption Mechanism

  2016cites this paper
• A new publicly verifiable blind detection scheme for intellectual property protection

  2016cites this paper
• Hardware IP Watermarking and Fingerprinting

  2016cites this paper
• A FORTIS : A Comprehensive Solution for Establishing Forward Trust for Protecting IPs and ICs UJJWAL

  2016cites this paper
• Establishment of Trust and Integrity in Modern Supply Chain from Design to Resign

  2016cites this paper
• FORTIS: A Comprehensive Solution for Establishing Forward Trust for Protecting IPs and ICs

  2016cites this paper
• Combinational Logic Binding for FPGA System Security

  2016cites this paper
• A robust low-overhead watermarking for field authentication of intellectual property cores

  2016cites this paper
• Secure Licensing of IP Cores on SRAM-Based FPGAs

  2016cites this paper
• A Fault-Tolerant Watermarking Algorithm for FPGA IP Protection

  2015cites this paper
• Signature Restoration for Enhancing Robustness of FPGA IP Designs

  2015cites this paper
• Design Time Optimization for Hardware Watermarking Protection of HDL Designs

  2015cites this paper
• A new approach to protect FPGA based sequential IP cores

  2014cites this paper
• A Pragmatic Per-Device Licensing Scheme for Hardware IP Cores on SRAM-Based FPGAs

  2014cites this paper
• ABC: AGING-BASED IC CONFIGURATION UNIVERSITY OF CALIFORNIA, LOS ANGELES APRIL 2014 FINAL TECHNICAL REPORT APPROVED FOR PUBLIC RELEASE; DISTRIBUTION UNLIMITED

  2014cites this paper
• A Blind Dynamic Fingerprinting Technique for Sequential Circuit Intellectual Property Protection

  2014influential citation
• PUF-based Hardware and Software Active IP Protection

  2014cites this paper
• Counterfeit Integrated Circuits: A Rising Threat in the Global Semiconductor Supply Chain

  2014cites this paper
• A survey on security and trust of FPGA-based systems

  2014cites this paper
• Quantitative Intellectual Property Protection Using Physical-Level Characterization

  2013cites this paper
• SECURE PUBLIC VERIFICATION OF IP MARKS IN FPGA USING MODIFIED LFSR

  2013cites this paper
• RFID based access control protection scheme for SRAM FPGA IP cores

  2013cites this paper
• A Survey of Techniques for VLSI IP Protection

  2013cites this paper
• An FPGA-based intellectual property protection method at physical design level

  2012cites this paper
• Performance Evaluation for IP Protection Watermarking Techniques

  2012cites this paper
• Watermarking Techniques for Intellectual Property Protection in SOC Designs

  2012cites this paper
• Secure Public Verification of IP Marks in FPGA Design Through a Zero-Knowledge Protocol

  2012cites this paper
• Dynamic Polymorphic Reconfiguration to Effectively Cloak a Circuit's Function

  2012cites this paper
• Securing netlist-level FPGA design through exploiting process variation and degradation

  2012cites this paper
• Efficient verification of IP watermarks in FPGA designs through lookup table content extracting

  2012cites this paper
• Trusted Design in FPGAs

  2012cites this paper
• Discrete Wavelet Transform Based Circuit Layout Fingerprinting using Chaotic System

  2012cites this paper
• Architectural enhancements to increase trust in cyber-physical systems containing untrusted software and hardware

  2012cites this paper
• A DFA-based Distributed IP Watermarking Method Using Data

  2011cites this paper
• SoC: A Real Platform for IP Reuse, IP Infringement, and IP Protection

  2011influential citation
• Verifying the Authorship of Embedded IP Cores : Watermarking and Core Identification Techniques

  2011cites this paper
• Protección de la propiedad intelectual de circuitos digitales para la síntesis de descripciones de alto nivel

  2011cites this paper
• The Design and FPGA Implementation of FSM-based Intellectual Property Watermark Algorithm at Behavioral Level

  2011cites this paper
• A Chaotic IP Watermarking in Physical Layout Level Based on FPGA

  2011influential citation
• Intellectual property protection (IPP) using obfuscation in C, VHDL, and Verilog coding

  2011cites this paper
• Watermarking strategies for IP protection of micro-processor cores

  2010cites this paper
• Techniques for Increasing Security and Reliability of IP Cores Embedded in FPGA and ASIC Designs

  2010cites this paper
• Performance Evaluation for Watermarking Techniques

  2010cites this paper
• Protection of microprocessor-based cores for FPL devices

  2010cites this paper
• Robust intellectual property protection of VLSI physical design

  2010cites this paper
• Secure Leakage-Proof Public Verification of IP Marks in VLSI Physical Design

  2009cites this paper
• Robust Verification of Public Marks in FPGA Design through a Zero-Knowledge Protocol

  2009influential citation
• WATERMARKING FPGA BITSTREAM FOR IP PROTECTION

  2008cites this paper
• Post Layout Watermarking Design Method for IP Protection

  2008cites this paper
• Watermarking FPGA bitstream for IP protection

  2008cites this paper
• Netlist-level IP protection by watermarking for LUT-based FPGAs

  2008cites this paper
• Post layout watermarking design method for IP protection

  2008cites this paper
• Chapter 4 – Reconfiguration Management

  2008cites this paper
• Intellectual property protection of IP cores through high-level watermarking

  2007cites this paper
• Reconfigurable Computing: The Theory and Practice of FPGA-Based Computation

  2007cites this paper
• An Efficient and Reliable Watermarking System for IP Protection

  2007cites this paper
• Features, Design Tools, and Application Domains of FPGAs

  2007cites this paper
• Digital Signature Embedding Technique for IP Core Protection

  2007cites this paper
• IPP@HDL: Efficient Intellectual Property Protection Scheme for IP Cores

  2007influential citation
• A fingerprinting method based on module extraction used to protect intellectual property

  2006cites this paper
• Protecting Combinational Logic Synthesis Solutions

  2006cites this paper
• IPP Watermarking Technique for IP Core Protection on FPL Devices

  2006cites this paper
• Intellectual Property Protection in Collaborative Design through Lean Information Modeling and Sharing

  2006cites this paper
• A watermarking system for IP protection by a post layout incremental router

  2005cites this paper
• Rewiring for watermarking digital circuit netlists

  2005cites this paper
• A method for hardware metering

  2005cites this paper
• IP protection for FPGA implementation of DSP algorithms

  2005influential citation
• A post layout watermarking method for IP protection

  2005cites this paper
• Behavioral synthesis techniques for intellectual property protection

  2005cites this paper
• Introduction to the Inverse Problems of Biometrics

  2005cites this paper
• Watermarking strategies for RNS-based system intellectual property protection

  2005cites this paper
• Fair watermarking using combinatorial isolation lemmas

  2004cites this paper