Boosting the performance of embedded vision systems using a DSP/FPGA co-processor system

Sensor systems for robotics and autonomous systems usually require small-sized and power-aware dedicated solutions for their realization. Therefore, an embedded system is the first choice - but the drawback is weaker computing power compared to state-of-the-art PC-based systems. This paper describes our approach on "boosting" the computing power of embedded vision systems. Our system consists of a platform based on a digital signal processor (DSP) enhanced by an additional field programmable gate array (FPGA) used as a co-processor. In our novel approach called resource optimized co-processing, both the DSP and the FPGA are driven in parallel for the execution of crucial parts of the vision algorithms. Thereby, through efficient usage of system resources a significant increase of the system performance is possible. The approach and the achievable profit in computing power is outlined in the paper. Based on an example case - the realization of a robot soccer embedded vision sensor - the usefulness and the powerfulness of our approach is demonstrated. In this demo case, by applying resource optimized co-processing, the most crucial and computing-intensive function was executed twice as fast as before. Thus, we were able to fulfill the stringent real-time requirements of the vision system.

• Publication year

  2007

• Venue

  IEEE International Conference on Systems, Man and Cybernetics

• Publication date

  2007-10-01

• Fields of study

  Computer Science, Engineering

• Identifiers
  DOI 10.1109/ICSMC.2007.4413943
• External record

  Open on Semantic Scholar

• Source metadata

  Semantic Scholar

• No claims are published for this paper.

• No concepts are published for this paper.

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