Virtualizing transactional memory

No abstract is available for this paper.

• Publication year

  2005

• Venue

  International Symposium on Computer Architecture

• Publication date

  2005-05-01

• Fields of study

  Computer Science

• Identifiers
  DOI 10.1109/ISCA.2005.54
• External record

  Open on Semantic Scholar

• Source metadata

  Semantic Scholar

• No claims are published for this paper.

• No concepts are published for this paper.

• Unbounded transactional memory

  2005influential reference
• Thread-Level Transactional Memory

  2005cited by this paper
• Transactional memory coherence and consistency

  2004cited by this paper
• Software transactional memory for dynamic-sized data structures

  2003cited by this paper
• Scalable hardware memory disambiguation for high-ILP processors

  2003cited by this paper
• Checkpoint processing and recovery: towards scalable large instruction window processors

  2003cited by this paper
• Transactional lock-free execution of lock-based programs

  2002influential reference
• Multiscalar Processors

  2002cited by this paper
• Removing architectural bottlenecks to the scalability of speculative parallelization

  2001cited by this paper
• Correctly implementing value prediction in microprocessors that support multithreading or multiprocessing

  2001cited by this paper
• Speculative lock elision: enabling highly concurrent multithreaded execution

  2001cited by this paper
• Summary cache: a scalable wide-area web cache sharing protocol

  2000cited by this paper
• Free transactions with Rio Vista

  1997cited by this paper
• Software transactional memory

  1995cited by this paper
• Multiple reservations and the Oklahoma update

  1993influential reference
• Lightweight recoverable virtual memory

  1993cited by this paper
• Transactional Memory: Architectural Support For Lock-free Data Structures

  1993influential reference
• Practical performance of Bloom filters and parallel free-text searching

  1989cited by this paper
• 801 storage: architecture and programming

  1987cited by this paper
• An architecture for mostly functional languages

  1986cited by this paper
• Concurrent reading and writing

  1977cited by this paper
• The notions of consistency and predicate locks in a database system

  1976cited by this paper
• Space/time trade-offs in hash coding with allowable errors

  1970cited by this paper
• One-Level Storage System

  1962cited by this paper

• BoostTM: Best-effort performance guarantees in best-effort hardware transactional memory for distributed manycore architectures

  2025cites this paper
• Enabling Efficient Transaction Processing on CXL-Based Memory Sharing

  2025cites this paper
• CTXNL: A Software-Hardware Co-designed Solution for Efficient CXL-Based Transaction Processing

  2025cites this paper
• Exploring multiprocessor approaches to time series analysis

  2024cites this paper
• LockillerTM: Enhancing Performance Lower Bounds in Best-Effort Hardware Transactional Memory

  2024cites this paper
• Seesaw Counting Filter: A Dynamic Filtering Framework for Vulnerable Negative Keys

  2023cites this paper
• Safety Hints for HTM Capacity Abort Mitigation

  2023cites this paper
• An efficient hardware supported and parallelization architecture for intelligent systems to overcome speculative overheads

  2022cites this paper
• Adaptive Versioning in Transactional Memory Systems

  2021cites this paper
• Migration in Hardware Transactional Memory on Asymmetric Multiprocessor

  2021cites this paper
• Unbounded Hardware Transactional Memory for a Hybrid DRAM/NVM Memory System

  2020cites this paper
• Software TLB Management Method Based on Balanced Binary Tree

  2020cites this paper
• Transaction-Based Core Reliability

  2020cites this paper
• Chronos: Efficient Speculative Parallelism for Accelerators

  2020cites this paper
• An Efficient Approach to Achieve Compositionality using Optimized Multi-Version Object Based Transactional Systems

  2019cites this paper
• Performance Tradeoffs in Software Transactional Memory

  2019cites this paper
• Improving hardware transactional memory parallelization of computational geometry algorithms using privatizing transactions

  2019cites this paper
• Soporte de reducciones y orden en sistemas de memoria transaccional

  2019cites this paper
• Adaptive Versioning in Transactional Memories

  2019cites this paper
• Multiversioned Page Overlays: Enabling Faster Serializable Hardware Transactional Memory

  2019influential citation
• Dependency safety for Java - Implementing and testing failboxes

  2019cites this paper
• TuFast: A Lightweight Parallelization Library for Graph Analytics

  2019cites this paper
• Modular transactions: bounding mixed races in space and time

  2019cites this paper
• Barreras especulativas con memoria transaccional

  2019cites this paper
• A Look at Computer Architecture Evaluation Methodologies

  2018cites this paper
• Improving Parallelism in Hardware Transactional Memory

  2018cites this paper
• Toward a software transactional memory for heterogeneous CPU–GPU processors

  2018cites this paper
• Hardware Multithreaded Transactions

  2018cites this paper
• Architectural techniques to unlock ordered and nested speculative parallelism

  2018cites this paper
• DHTM: Durable Hardware Transactional Memory

  2018cites this paper
• Architectural Support for Unlimited Memory Versioning and Renaming

  2018cites this paper
• Optimizing Throughput Architectures for Speculative Parallelism by Weeraratna Patabendige Maleen Hasanka Abeydeera

  2018cites this paper
• Techniques for Enhancing the Efficiency of Transactional Memory Systems

  2018cites this paper
• Architectural support for persistent memory systems

  2018cites this paper
• Leverage Redundancy in Hardware Transactional Memory to Improve Cache Reliability

  2018cites this paper
• SAM: Optimizing Multithreaded Cores for Speculative Parallelism

  2017cites this paper
• Performance evaluation of delayed-committing transactional memory

  2017cites this paper
• Software Transactional Memory

  2017cites this paper
• Leveraging irrevocability to deal with signature saturation in hardware transactional memory

  2017cites this paper
• An Analytical Model of Hardware Transactional Memory

  2017cites this paper
• U . S . Patent Jan . 10 , 2012 Sheet 1 of 6 US 8 , 095 , 824 B 2 CORE 101 CORE 102 Arch Reg

  2017cites this paper
• Advanced algorithm for scheduling TM transactions with conflict avoidance

  2017cites this paper
• FPGA-Accelerated Transactional Execution of Graph Workloads

  2017cites this paper
• Architecting Persistent Memory Systems

  2017cites this paper
• Optimizing throughput architectures for speculative parallelism

  2017cites this paper
• Enhancing scalability in best-effort hardware transactional memory systems

  2017cites this paper
• A Transactional Model for Parallel Programming of Graph Applications on Computing Clusters

  2017cites this paper
• Isotope: Transactional Isolation for Block Storage

  2016cites this paper
• Power Efficient Hardware Transactional Memory

  2016influential citation
• Innovative Research and Applications in Next-Generation High Performance Computing

  2016cites this paper
• Taming Transactions: Towards Hardware-Assisted Control Flow Integrity Using Transactional Memory

  2016cites this paper
• Scaling HTM-Supported Database Transactions to Many Cores

  2016cites this paper
• EXCITE-VM: Extending the virtual memory system to support snapshot isolation transactions

  2016cites this paper
• Concurrent abstract state machines

  2016cites this paper
• Primus Inter Pares ∗ : Improving Parallelism in Hardware Transactional Memory

  2016cites this paper
• A Filtering Mechanism to Reduce Network Bandwidth Utilization of Transaction Execution

  2016cites this paper
• Hybrid STM/HTM for nested transactions in Java

  2016cites this paper
• Performance Modelling of Intel ’ s Hardware Transactional Memory Implementation

  2016influential citation
• Performance Modelling of Hardware Transactional Memory

  2016cites this paper
• PleaseTM: Enabling transaction conflict management in requester-wins hardware transactional memory

  2016influential citation
• Delegated persist ordering

  2016cites this paper
• Architectural Support to Exploit Commutativity in Shared-Memory Systems

  2016cites this paper
• Remote Transaction Commit: Centralizing Software Transactional Memory Commits

  2016cites this paper
• Optimizing memory transactions for large-scale programs

  2016cites this paper
• Safety-Liveness Exclusion in Distributed Computing

  2015cites this paper
• Using Variable Conflict Granularity to Improve the Performance of Transactional Memory Support for Games

  2015cites this paper
• A formal semantics of nested atomic sections with thread escape

  2015cites this paper
• On Optimizing Transactional Memory: Transaction Splitting, Scheduling, Fine-grained Fallback, and NUMA Optimization

  2015cites this paper
• Java-pohjaiset ohjelmalliset transaktiomuistit

  2015cites this paper
• A priority scheduling for TM pathologies

  2015cites this paper
• Synchronizing Parallel Tasks Using STM

  2015cites this paper
• Transactions: they're not just for banking any more

  2015cites this paper
• Determinism at Standard-Library Level in TM-Based Applications

  2015cites this paper
• Fault-tolerant Distributed Systems in Hardware

  2015cites this paper
• Fast and efficient commits for Lazy-Lazy hardware transactional memory

  2015cites this paper
• Energy-Efficient and High-Performance Lock Speculation Hardware for Embedded Multicore Systems

  2015cites this paper
• The Scalability of Disjoint Data Structures on a New Hardware Transactional Memory System

  2015cites this paper
• A Predictable Transactional Memory Architecture with Selective Conflict Resolution for Mixed-Criticality Support in MPSoCs

  2015cites this paper
• A new concurrency control mechanism for multi-threaded environment using transactional memory

  2015cites this paper
• Distributed Computing Column Maurice Herlihy’s 60th Birthday Celebration

  2015cites this paper
• Hardware Transactional Memory with Delayed-Committing

  2015cites this paper
• Low-overhead software transactional memory with progress guarantees and strong semantics

  2015cites this paper
• Observationally Cooperative Multithreading

  2015cites this paper
• DaSH: A benchmark suite for hybrid dataflow and shared memory programming models

  2015cites this paper
• Disjoint-Access Parallelism in Software Transactional Memory

  2015cites this paper
• Hardware-Supported Transactional Memory

  2015cites this paper
• Case Study: Using Transactions in Memcached

  2015cites this paper
• Transactional Interference-Less Balanced Tree

  2015cites this paper
• Dynamic Interrupt Controller and Conflict Management for Transactional Memory in Embedded System

  2015cites this paper
• Multi-level Processing to Reduce Cost of Synchronization

  2015cites this paper
• Efficient Correction of Anomalies in Snapshot Isolation Transactions

  2015cites this paper
• Hardware Approaches to Transactional Memory in Chip Multiprocessors

  2015cites this paper
• Extracting Parallelism from Legacy Sequential Code Using Software Transactional Memory

  2015cites this paper
• Valor: efficient, software-only region conflict exceptions

  2015cites this paper
• Conflict Detection in Hardware Transactional Memory

  2015cites this paper
• Distributed Computing Column 58: Maurice Herlihy's 60th Birthday Celebration

  2015cites this paper
• Speculative Parallelization of Object-Oriented Applications

  2015cites this paper
• Compiler Assisted Speculation for Multithreaded Systems

  2015cites this paper
• Ensuring dependability and improving performance of transactional systems deployed on multi-core architectures

  2014cites this paper
• Approches d'optimisation et de personnalisation des réseaux sur puce (NoC : Networks on Chip). (Networks on Chip optimization and customization approaches)

  2014cites this paper